Решил вынести файл описания регистров отдельно, так как время от времени всплывают неточности или банальные опечатки.
НЕ РЕКОМЕНДУЕТСЯ! См. ниже! STC_8H.DAT (обновление 14-12-2024)
Код:
' Обновил 11-12-2024 09:08 [BIT] ACC = E0 B = F0 PSW = D0 P0 = 80 P1 = 90 P2 = A0 P3 = B0 P4 = c0 P5 = c8 P6 = e8 P7 = f8 SCON = 98 T2CON = C8 IE = A8 IP = B8 TCON = 88 [BYTE] SP = 81 DPL = 82 DPH = 83 TH0 = 8C TH1 = 8D TL0 = 8A TL1 = 8B PCON = 87 TMOD = 89 SBUF = 99 T2MOD = C9 TL2 = CC TH2 = CD RCAP2L = CA RCAP2H = CB AUXR = 8E SADDR = A9 IPH = B7 SADEN = B9 P_SW1 = a2 P_SW2 = ba S1CON = 9A ' UARTs control register S1BUF = 9B S2CON = 9A ' UARTs control register S2BUF = 9B S3CON = AC S3BUF = AD S4CON = 84 S4BUF = 85 IAP_DATA = c2 ' IAP EEPROM Flash Data Register IAP_ADDRH = c3 ' IAP Flash Address High Byte IAP_ADDRL = c4 ' IAP Flash Address Low Byte IAP_CMD = c5 ' IAP Flash Command Register IAP_TRIG = c6 ' IAP Flash Trigger register IAP_CONTR = c7 ' IAP Control Register IAP_TPS = F5 ' IAP Waiting Time Control Register WDT_CONTR = C1 ' Watchdog Timer Register RSTCFG = FF ' Reset Configuration Register WKTCL = AA ' Power-down wake-up timer count register WKTCH = AB ' WKTEN = 7 P0M1 = 93 ' mode register 1 P0M0 = 94 ' mode register 0 P1M1 = 91 ' PnM1.x PnM0.x Pn.x mode P1M0 = 92 ' 0 0 Quasi bidirectional mode P2M1 = 95 ' 0 1 Push-pull output mode P2M0 = 96 ' 1 0 High-impedance input mode P3M1 = b1 ' 1 1 Open drain mode P3M0 = b2 P4M1 = b3 P4M0 = b4 P5M1 = c9 P5M0 = ca P6M1 = cb P6M0 = cc P7M1 = e1 P7M0 = e2 T4T3M = D1 T4H = D2 T4L = D3 T3H = D4 T3L = D5 T2H = d6 T2L = d7 ADC_CONTR = BC ' control register ADC_RESh = BD ' Result High Byte ADC_RESL= BE ' Result Low Byte ADCCFG = DE ' Configuration Register SPSTAT = cd ' SPI Register SPCTL = ce SPDAT = cf CCON = D8 ' PCA CMOD = D9 CCAPM0 = DA CCAPM1 = DB CCAPM2 = DC CCAPM3 = DD CCAPM4 = DE CCAPM5 = DF CL = E9 CCAP0L = EA CCAP1L = EB CCAP2L = EC CCAP3L = ED CCAP4L = EE CCAP5L = EF CH = F9 CCAP0H = FA CCAP1H = FB CCAP2H = FC CCAP3H = FD CCAP4H = FE CCAP5H = FF PCA_PWM0 = F2 PCA_PWM1 = F3 PCA_PWM2 = F4 PCA_PWM3 = F5 PCA_PWM4 = F6 PCA_PWM5 = F7 [SBIT] TF1 = 8f TR1 = 8e TF0 = 8d TR0 = 8c IE1 = 8b IT1 = 8a IE0 = 89 IT0 = 88 EA = AF ' IE EPCA_LVD = AE EADC_SPI = AD ES = AC ET1 = AB EX1 = AA ET0 = A9 EX0 = A8 PPCA_LVD = BE ' IP PADC_SPI = BD PS = BC PT1 = BB PX1 = BA PT0 = B9 PX0 = B8 CY = d7 ' PSW AC = d6 F0 = d5 RS1 = d4 RS0 = d3 OV = d2 F1 = d1 P = d0 RD = b7 ' P3 WR = b6 T1 = b5 T0 = b4 INT1 = b3 INT0 = b2 TXD = b1 RXD = b0 SM0 = 9f ' SCON SM1 = 9e SM2 = 9d REN = 9c TB8 = 9b RB8 = 9a TI = 99 RI = 98 TF2 = cf ' T2CON EXF2 = ce RCLK = cd TCLK = cc EXEN2 =cb TR2 = ca C_T2 = c9 CP_RL2= c8 [XBYTE] CKSEL = FE00 ' Clock selection register CLKDIV = FE01 ' Clock Division Register IRCCR = FE02 ' Internal Oscillator control register XOSCCR = FE03 ' External Oscillator control register IRC32KCR = FE04 ' Internal 32KHz Oscillator control register MCLKOCR = FE05 ' Main clock output control register IRCDB = fe06 IRC48MCR = fe07 ' X32KCR = FE08 ' External 32KHz Oscillator control register HSCLKDIV = fe0b ' T3T4PIN = FEAC ' T3/T4 Select register ADCEXCFG = fead CMPEXCFG = feae ADCTIM = FEA8 ' Timing Control Register TM2PS = FEA2 ' Timer2 8-bit Prescaler Register TM3PS = FEA3 ' Timer3 8-bit Prescaler Register TM4PS = FEA4 ' Timer4 8-bit Prescaler Register P0PU = FE10 ' Pull-up resistor control register P1PU = FE11 ' Internal 4.1K pull-up resistor control bit P2PU = FE12 ' 0: Disable 4.1K pull-up resistor inside the port P3PU = FE13 ' 1: Enable 4.1K pull-up resistor inside the port P4PU = FE14 P5PU = FE15 P6PU = FE16 P7PU = FE17 P0NCS = FE18 ' Schmitt trigger control register P1NCS = FE19 ' Schmitt trigger control bit: P2NCS = FE1a ' 0: Enable schmitt trigger function on the port. (Schmitt trigger is enabled by default after power-on reset.) P3NCS = FE1b ' 1: Disable schmitt trigger function on the port. P4NCS = FE1c P5NCS = FE1d P6NCS = FE1e P7NCS = FE1f P0SR = FE20 ' Level Shift Rate Register P1SR = FE21 P2SR = FE22 ' Level shifting speed control bits: P3SR = FE23 ' 0: Fast level shifting, and the corresponding up and down impact will be relatively large. P4SR = FE24 ' 1: Slow level shifting, and the corresponding up and down impact will be relatively small. P5SR = FE25 P6SR = FE26 P7SR = FE27 P0IE = FE30 ' Input Enable Control Register P1IE = FE31 P2IE = FE32 P3IE = FE33 P4IE = FE34 P5IE = FE35 ' Digital signal input enable control: P6IE = FE36 ' 0: Disable digital signal input. P7IE = FE37 ' 1: Enable digital signal input. If the I/O is used as a digital port, it must be set to 1 P0DR = FE28 ' Drive Current Control Register P1DR = FE29 ' 0: Enhanced drive ability P2DR = FE2a ' 1: General drive ability P3DR = FE2b P4DR = FE2c P5DR = FE2d P6DR = FE2e P7DR = FE2f I2ccfg = Fe80 I2cmscr = Fe81 I2cmsst = Fe82 I2cslcr = Fe83 I2cslst = Fe84 I2csladr = Fe85 I2ctxd = Fe86 I2crxd = Fe87 I_tksu = 011B I_rtc = 0123 I_p0int = 012B I_p1int = 0133 I_p2int = 013B I_p3int = 0143 I_p4int = 014B I_p5int = 0153 I_p6int = 015B I_p7int = 0163 I_dma_m2m = 017B I_dma_adc = 0183 I_dma_spi = 018B I_dma_ur1t = 0193 I_dma_ur1r = 019B I_dma_ur2t = 01A3 I_dma_ur2r = 01AB I_dma_ur3t = 01B3 I_dma_ur3r = 01BB I_dma_ur4t = 01C3 I_dma_ur4r = 01CB I_dma_lcm = 01D3 I_lcm = 01DB Pwm1_etrps = Feb0 Pwm1_eno = feb1 Pwm1_ps = feb2 Pwm1_ioaux = feb3 Pwm2_etrps = feb4 Pwm2_eno = feb5 Pwm2_ps = feb6 Pwm2_ioaux = feb7 Pwm1_cr1 = fec0 Pwm1_cr2 = fec1 Pwm1_smcr = fec2 Pwm1_etr = fec3 Pwm1_ier = fec4 Pwm1_sr1 = fec5 Pwm1_sr2 = fec6 Pwm1_egr = fec7 Pwm1_ccmr1 = fec8 Pwm1_ccmr2 = fec9 Pwm1_ccmr3 = feca Pwm1_ccmr4 = fecb Pwm1_ccer1 = fecc Pwm1_ccer2 = fecd Pwm1_cntr = fece Pwm1_cntrh = fece Pwm1_cntrl = fecf Pwm1_pscr = fed0 Pwm1_pscrh = fed0 Pwm1_pscrl = fed1 Pwm1_arr = fed2 Pwm1_arrh = fed2 Pwm1_arrl = fed3 Pwm1_rcr = fed4 Pwm1_ccr1 = fed5 Pwm1_ccr1h = fed5 Pwm1_ccr1l = fed6 Pwm1_ccr2 = fed7 Pwm1_ccr2h = fed7 Pwm1_ccr2l = fed8 Pwm1_ccr3 = fed9 Pwm1_ccr3h = fed9 Pwm1_ccr3l = feda Pwm1_ccr4 = fedb Pwm1_ccr4h = fedb Pwm1_ccr4l = fedc Pwm1_bkr = fedd Pwm1_dtr = fede Pwm1_oisr = fedf Pwm2_cr1 = fee0 Pwm2_cr2 = fee1 Pwm2_smcr = fee2 Pwm2_etr = fee3 Pwm2_ier = fee4 Pwm2_sr1 = fee5 Pwm2_sr2 = fee6 Pwm2_egr = fee7 Pwm2_ccmr1 = fee8 Pwm2_ccmr2 = fee9 Pwm2_ccmr3 = feea Pwm2_ccmr4 = feeb Pwm2_ccer1 = feec Pwm2_ccer2 = feed Pwm2_cntr = feee Pwm2_cntrh = feee Pwm2_cntrl = feef Pwm2_pscr = fef0 Pwm2_pscrh = fef0 Pwm2_pscrl = fef1 Pwm2_arr = fef2 Pwm2_arrh = fef2 Pwm2_arrl = fef3 Pwm2_rcr = fef4 Pwm2_ccr1 = fef5 Pwm2_ccr1h = fef5 Pwm2_ccr1l = fef6 Pwm2_ccr2 = fef7 Pwm2_ccr2h = fef7 Pwm2_ccr2l = fef8 Pwm2_ccr3 = fef9 Pwm2_ccr3h = fef9 Pwm2_ccr3l = fefa Pwm2_ccr4 = fefb Pwm2_ccr4h = fefb Pwm2_ccr4l = fefc Pwm2_bkr = fefd Pwm2_dtr = fefe Pwm2_oisr = feff Pwma_etrps = feb0 Pwma_eno = feb1 Pwma_ps = feb2 Pwma_ioaux = feb3 Pwmb_etrps = feb4 Pwmb_eno = feb5 Pwmb_ps = feb6 Pwmb_ioaux = feb7 Pwma_cr1 = fec0 Pwma_cr2 = fec1 Pwma_smcr = fec2 Pwma_etr = fec3 Pwma_ier = fec4 Pwma_sr1 = fec5 Pwma_sr2 = fec6 Pwma_egr = fec7 Pwma_ccmr1 = fec8 Pwma_ccmr2 = fec9 Pwma_ccmr3 = feca Pwma_ccmr4 = fecb Pwma_ccer1 = fecc Pwma_ccer2 = fecd 'Pwma_cntr = fece Pwma_cntrh = fece Pwma_cntrl = fecf 'Pwma_pscr = fed0 Pwma_pscrh = fed0 Pwma_pscrl = fed1 'Pwma_arr = fed Pwma_arrh = fed2 Pwma_arrl = fed3 Pwma_rcr = fed4 'Pwma_ccr1 = fed5 Pwma_ccr1h = fed5 Pwma_ccr1l = fed6 'Pwma_ccr2 = fed7 Pwma_ccr2h = fed7 Pwma_ccr2l = fed8 'Pwma_ccr3 = fed9 Pwma_ccr3h = fed9 Pwma_ccr3l = feda Pwma_ccr4 = fedb Pwma_ccr4h = fedb Pwma_ccr4l = fedc Pwma_bkr = fedd Pwma_dtr = fede Pwma_oisr = fedf Pwmb_cr1 = fee0 Pwmb_cr2 = fee1 Pwmb_smcr = fee2 Pwmb_etr = fee3 Pwmb_ier = fee4 Pwmb_sr1 = fee5 Pwmb_sr2 = fee6 Pwmb_egr = fee7 Pwmb_ccmr1 = fee8 Pwmb_ccmr2 = fee9 Pwmb_ccmr3 = feea Pwmb_ccmr4 = feeb Pwmb_ccer1 = feec Pwmb_ccer2 = feed 'Pwmb_cntr = feee Pwmb_cntrh = feee Pwmb_cntrl = feef 'Pwmb_pscr = fef0 Pwmb_pscrh = fef0 Pwmb_pscrl = fef1 'Pwmb_arr = fef2 Pwmb_arrh = fef2 Pwmb_arrl = fef3 Pwmb_rcr = fef4 'Pwmb_ccr5 = fef5 Pwmb_ccr5h = fef5 Pwmb_ccr5l = fef6 'Pwmb_ccr6 = fef7 Pwmb_ccr6h = fef7 Pwmb_ccr6l = fef8 'Pwmb_ccr7 = fef9 Pwmb_ccr7h = Fef9 Pwmb_ccr7l = Fefa 'Pwmb_ccr8 = Fefb Pwmb_ccr8h = Fefb Pwmb_ccr8l = fefc Pwmb_bkr = Fefd Pwmb_dtr = Fefe Pwmb_oisr = Feff [MISC] up = STC8H IRAM = 128 clockdiv = 1 org = DE I_adc = 2B I_lvd = 33 I_uart2 = 43 I_spi = 4B I_int2 = 53 I_int3 = 5B I_TIMER2 = 63 I_int4 = 83 I_uart3 = 8B I_uart4 = 93 I_TIMER3 = 9B I_TIMER4 = A3 I_cmp = AB I_i2c = C3 I_usb = CB I_pwma = D3 I_pwmb = DB
