'***************************************************************************
'*
'* 	Title  : AT45 pulse generator
'*	independent setting of frequency and pulse width 0..100%
'*	frequency range: 10.6 MHz to 1.1 Hz
'*
'*          Pinb.2 button Toggle T1 clock source
'*          Pinb.0 button inc prescaler 1..15, no interrupt used
'*          Pinb.3 input poti 10k set frequency
'*          Pinb.4 input poti 10k set pulse width
'*          Pinb.1 output OCR1A frequency
'*
'* fpwm=fck/(OCR1C+1), Pw=Ocr1a -> Freq*Pw=fck*Ocr1a/(OCR1C+1), ratio
'*
'* program code  : BASCOM AVR basic
'* Last updated  : GS 4-2012
'* Target  :       ATtiny45
'*
'***************************************************************************
'  This program is free software; you can redistribute it and/or
'  modify it under the terms of the GNU General Public License.
'  This program is distributed in the hope that it will be useful,
'  but WITHOUT ANY WARRANTY; 
'***************************************************************************
'
'   ATtiny45 dip
'(PCINT5/RESET/ADC0/dW)         PB5  VCC
'(PCINT3/XTAL1/CLKI/OC1B/ADC3)  PB3  PB2 (SCK/USCK/SCL/ADC1/T0/INT0/PCINT2)
'(PCINT4/XTAL2/CLKO/OC1B/ADC2)  PB4  PB1 (MISO/DO/AIN1/OC0B/OC1A/PCINT1)
'                               GND  PB0 (MOSI/DI/SDA/AIN0/OC0A/OC1A/AREF/PCINT0)
'
';***************************************************************************

$regfile = "ATtiny45.DAT"
$crystal = 8000000
$hwstack = 32                                               ' default use 32 for the hardware stack
$swstack = 10                                               'default use 10 for the SW stack
$framesize = 20                                             'default use 40 for the frame

Dim I As Byte
Dim Prescc1 As Byte
Dim Channel As Byte
Dim W As Word
Dim Freq As Word
Dim Pw As Word


Ddrb = &B00000010
Portb = &B00000101                                          'pullup PB0,2

'*********************************************************************


$asm                                                        ' turn on PLL
  ldi  R24, &B00000010                                      '; Enable PLL (1<<PLLE)
  out PLLCSR, R24
waitPLL:
  in R24, PLLCSR                                           '; Wait for PLL to lock (approx. 100ms)
  sbrs  R24, PLOCK
  rjmp  waitPLL

  in R24, PLLCSR                                           '; Set PLL as clock source
  ldi R25,&B00000100                                        ';(1<<PCKE)
  or R24, R25
  Out Pllcsr , R24
$end Asm


Didr0 = &B00011000
Config Adc = Single , Prescaler = Auto , Reference = Avcc
Start Adc



Tccr1 = &B11100011                                          'CTC, pwm, clr
' B11100000 = 224 dec
Prescc1 = 3

Ocr1c = 199
Ocr1a = 100

'Start Timer1

Do                                                          'all in 1 loop

Debounce Pinb.2 , 0 , Togt1ck , Sub                         'Toggle T1 clock source
Debounce Pinb.0 , 0 , Incpre , Sub                          'increment prescaler

Channel = 2
Freq = 0
For I = 1 To 8
   W = Getadc(channel)
   Freq = Freq + W
Next I

Channel = 3
Pw = 0
For I = 1 To 8
   W = Getadc(channel)                                      '10 bit
   Pw = Pw + W
Next I

Freq = Freq / 32                                            'make 8 bit
Pw = Pw / 64
Pw = Pw * Freq
Pw = Pw / 128

If Pw = 0 Then Pw = 1
If Freq < 2 Then Freq = 2

Ocr1c = Freq
Ocr1a = Pw
' fpwm=fck/(OCR1C+1), Pw=Ocr1a -> Freq*Pw=fck*Ocr1a/(OCR1C+1), ratio

Loop

'********************************Sub*************************************

IncPre:
   Incr Prescc1                                             'inc prescaler
   If Prescc1 >= 16 Then Prescc1 = 1
   Tccr1 = 224 + Prescc1                                    'set prescaler
Return                                                      '


Togt1ck:                                                    'Toggle T1ck source
$asm                                                        ' turn on PLL
  in R24, PLLCSR
  sbrc R24, 2                                              '; PCKE not set
  rjmp dp1                                                  '; if set then clear
  sbr R24, 4                                               '; Set PLL as clock source
  out PLLCSR, R24
  rjmp dp2
Dp1:
   Cbr R24 , 4                                              '; Set system CK as clock source
  out PLLCSR, R24
Dp2:
$end Asm

Return